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®
Intel
855GME Chipset and Intel
Figure 89.
8-Bit Hub Interface Local HIREF/HI_VSWING Generation Circuit Option D
1. Each 0.01 µF bypass capacitor should be placed within 0.25 inches of HIREF/VREF pin (C4) and
HI_VSWING pin (C2).
8.1.4.1
GMCH Single Generated Voltage Reference Divider Circuit
This option allows the GMCH to use one voltage divider circuit to generate both HLVREF and
HLPSWING voltage references. The reference voltage for both HLVREF and HLPSWING must
meet the voltage specification in
percent tolerance (see
signals (< 10-15 mV). When the voltage specifications are not met, individually generated voltage
divider circuits for HLVREF and PSWING are required. Refer to
Figure 90
Figure 90. GMCH Locally Generated Reference Voltage Divider Circuit
Table
Table
69). Normal care needs to be taken to minimize crosstalk to other
depicts the GMCH locally generated reference voltage divider circuit.
C1
C3
January 2007
®
6300ESB ICH Embedded Platform Design Guide
68. The resistor values R1, R2, and R3 must be rated at 1
VCCHI
R1
PSWING
C5
R2
GMCH
HLVREF
C6
R3
Hub Interface
Section 8.1.4.2
for more details.
187
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