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®
Intel
855GME Chipset and Intel
®
Intel
6300ESB Design Guidelines
In some instances, it is desirable to program the FWH during assembly with the device soldered
down on the board. In order to decrease programming time it becomes necessary to apply 12 V to
the V
pin. The following circuit will allow testers to put 12 V on the V
PP
voltage separated from the 3.3 V plane to which the rest of the power pins are connected. This
circuit also allows the board to operate with 3.3 V on this pin during normal operation.
Figure 134.
FWH VPP Isolation Circuitry
9.14
GPIO Summary
The 6300ESB platform has 12 general purpose inputs, 9 general purpose outputs, and 16 general
purpose inputs/outputs.
Table 102.
GPIO Summary (Sheet 1 of 2)
GPIO Number
0
1
2
3
4
5
6
7
8
11
12
13
242
®
6300ESB ICH Embedded Platform Design Guide
3.3 V
12 V
Power Well
Input-Output
Core
Core
Core
Core
Core
Core
Core
Core
Resume
Resume
Resume
Resume
PP
(from Motherboard)
1 KΩ
FET
VPP
Tolerance
Input
3.3 V
Input
3.3 V
Input
5 V
Input
5 V
Input
5 V
Input
5 V
Input
3.3 V
Input
3.3 V
Input
3.3 V
Input
3.3 V
Input
3.3 V
Input
3.3 V
pin while keeping this
B1191-01
If Not Used
Recommend an
8.2 K Ω pull-up
resistor to
V
3.3
CC
Recommend an
8.2 K Ω pull-up
resistor to
V
3.3 or a 2.7
CC
K Ω pull-up
resistor to V
5
CC
Recommend an
8.2 K Ω pull-up
resistor to
V
3.3
CC
Recommend an
8.2 K Ω pull-up
resistor to
V
3.3
CCSus
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