Intel 855GME Design Manual page 250

®
Intel 855GME Chipset and Intel
Platform Clock Routing Guidelines
Figure 137
components, and all the related clock interconnects.
Figure 137. Clock Distribution Diagram
ITP
100 MHz Outputs
CK409
®
Intel 855GME
Chipset Clock
Distribution
250
®
6300ESB ICH Embedded Platform Design Guide
depicts the system clock subsystem including the clock generator, major platform
Low Voltage Differential Clocks
CLK66
66
MHz
100
MHz 48 MHz 14 MHz
PLL PLL
CPU
®
Intel
855GME
Chipset
DDRCLKs
SSC
SSCCLK
SSCCLK
/2
CLK14
USBCLK
DDR Clocks
Differential Pairs
D
(100/133 MHz)
I
M
M
D
I
M
M
DOTCLK
PCICLK
PCI Slot0
PCICLK
PCI Slot1
PCICLK
PCI Slot2
CLK33
SIO
CLK33
FWH
CLK33
CLK66 ®
Intel
6300ESB
CLK66
I/O
Controller
B1364-01