Intel ® 855Gme Chipset Graphics Memory Controller Hub (82855Gme); Intel ® Pentium ® M Processor/Intel ® Celeron ® M Processor Support; Integrated System Memory Dram Controller; Internal Graphics Controller - Intel 855GME Design Manual

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Intel 855GME Chipset and Intel
®
•
Intel
FSB):
— On-die 512-KB L2 Cache
— TDP = 7 W
— VCC-CORE: 1.004 V
— V
— 479-ball micro FCBGA package
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2.3.6 Intel
(82855GME)
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2.3.6.1 Intel Pentium
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Optimized for the Pentium M processor/Celeron M processor in 478-pin micro-FCPGA and
479-ball micro-FCBGA package
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AGTL+ bus driver technology with integrated GTL termination resistors (gated AGTL+
receivers for reduced power)
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Supports 32-bit AGTL+ bus addressing (no support for 36-bit address extension).
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Supports Uni-processor (UP) systems.
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400 MT/s Pentium M processor FSB support (100 MHz)
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2X Address, 4X Data
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12 deep in-order queue
2.3.6.2

Integrated System Memory DRAM Controller

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Supports up to two double-sided DIMMs (four rows populated) with unbuffered PC2100/
PC2700 DDR-SDRAM (with or without ECC)
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Supports 64 Mbit, 128 Mbit, 256 Mbit and 512 Mbit technologies for x8 and x16 width
devices
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Maximum of 2 Gbytes system memory by using 512 Mbit technology devices (double sided)
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Supports 266 MHz, and 333 MHz DDR devices
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64-bit data interface (72-bit with ECC)
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2100/2700 system memory interface
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Supports up to 16 simultaneous open pages
2.3.6.3

Internal Graphics Controller

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Graphics Core Frequency
— Display/Render frequency up to 250 MHz (with 1.35 V core voltage)
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3D Graphics Engine
— 3D Setup and Render Engine
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Celeron M Processor Ultra Low Voltage at 600 MHz (130 nm, 600 MHz, 400 MHz
: 1.8 V supported
CCA
855GME Chipset Graphics Memory Controller Hub
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M Processor/Intel
January 2007
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6300ESB ICH Embedded Platform Design Guide
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Celeron M Processor Support
System Overview
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