Qdr Address Signal Trace Width/Spacing Routing; Qdr Address Signal Group Routing Guidelines - Intel IXP28XX Manual

Network processors hardware design guide
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Table 19.
Figure 29.
Hardware Design Guide
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QDR Address Signal Group Routing Guidelines

Parameter
Signal Group
Topology
Reference Plane
Characteristic Trace Impedance
Main Trunk
Branches
RTT
Nominal Trace Width
Main Trunk
Arms of the T
Nominal Trace Separation
Group Spacing
1
Trace length P
+A to SRAMs
Trace length B, C
Trace length D
Trace length E, F
Maximum via count per signal
Length tuning method
1.
P refers to the package length.
Figure 29
illustrates routing for a QDR address signal trace width/spacing.

QDR Address Signal Trace Width/Spacing Routing

T
d2
Other
T
signal
Signals
T
d1
Routing Guideline
Address
Balanced-T topology
Ground
34 Ω ±5%
60 Ω ±5%
35 Ω ±1%
10 mils
3.5 mils
15 - 20 mils
Isolation from all other signals is 20 - 25mils.
Should be matched to K-Clk trace length minus 0.9 inches.
Maximum = 11.0 inches
Trace length from ball to ball for all Address nets should be
matched for the entire group to within 25 mils.
As short as possible; B and C should match.
Maximum B + E = 1.0 inches
Maximum C + F = 1.0 inches
As short as possible; Maximum = 100 mils
As short as possible.
Maximum B + E = 1.0 inches
Maximum C + F = 1.0 inches
As small as possible; Maximum = 12 vias
All address signals matched within ±25 mils, where length
includes package length compensation (P+A)
POWER or GND Plane
20 mil or larger
W
ADDRESS
Signa
Prepreg
POWER or GND Plane
IXP28XX Network Processor
QDR SRAM
S
W
D2
ADDRESS
Signal
D1
3993-01
67

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