Serial Ata Trace Length Pair Matching; Serial Ata Trace Length Guidelines; Sata Bias Connections; Serial Ata Trace Spacing Recommendation - Intel 855GME Design Manual

®
Intel 855GME Chipset and Intel
®
Intel 6300ESB Design Guidelines
Figure 92.

Serial ATA Trace Spacing Recommendation

Low-speed
Non-Periodic
Signal
9.1.1.3

Serial ATA Trace Length Pair Matching

Serial ATA signal pair traces should be trace length matched. The difference of two line traces in a
differential pair should be restricted to below 10 mils.
9.1.1.4

Serial ATA Trace Length Guidelines

The length of the differential pairs (i.e., Tx pair and Rx pair) should be designed to within the
recommend values. The recommended length of the trace is from two to eight inches. When the
trace length of the differential pair is longer than recommended, the high-frequency differential
signal suffers significant signal attenuation and an increase in inter-symbol interference.
Table 72.

SATA Routing Summary

Differential
Trace
Impedance
79.3 Ω ± 15%
9.1.1.5

SATA BIAS Connections

It is recommended that the SATARBIASP and the SATARBIASN pins be shorted at the package
and the routed to one end of a 24.9 Ω ± 1% resistor to ground. Place the resistor within 500 mils of
the 6300ESB and avoid routing next to clock pins.
192
®
6300ESB ICH Embedded Platform Design Guide
Differential
Pair
7.0 6.0
100 7.0
Distance in Mils
SATA Routing Requirements
7 mil width, 6 mil spacing
(Based on stackup described in
Section 3.1.)
Differential
Pair
6.0
100 7.0 7.0
Trace Length SATA Signal Length Matching
Length mismatch between signals
2-8 inches in a data pair should be no more 10
mils.
Clock/High-Speed
Periodic Signal
100
B1127-01