Hub Interface Checklist; Fwh/Lpc Interface Checklist - Intel 855GME Design Manual

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®
Intel
855GME Chipset and Intel
Schematic Checklist Summary
12.4.3

Hub Interface Checklist

Table 134.

Hub Interface Checklist

Checklist Items
HI[11]
HI[0:10]
HI_STBF
HI_STBS
HICLK
HICOMP
HIREF
HI_VSWING
12.4.4

FWH/LPC Interface Checklist

Table 135.

FWH/LPC Interface Checklist

Checklist Items
FWH[0:3]/
LAD[0:3]
LDRQ[0:1]
FWH[4]/
LFRAME#
FWH Decoupling
288
®
6300ESB ICH Embedded Platform Design Guide
Recommendations
When HI_11 is not used:
Pull to V
through a weak pull-down
SS
resistor:
~60 Ω (when trace impedance is 60 Ω )
~56 Ω (when trace impedance is 56 Ω )
~50 Ω (when trace impedance is 50 Ω )
No extra pull-up resistor
No extra pull-up resistor
No extra pull-up resistor
Ensure this pin is connected to a 66MHz
clock output of the clock generator (CK409)
through a 33 Ω resistor
Tie the HICOMP pin to a 52.3 Ω ±1% (when
trace impedance is 60 Ω ) or 48.7 Ω ±1%
(when trace impedance is 56 Ω ), or 43.2 Ω
±1% (when impedance is 50 Ω ) pull-up
resistor (to V
350 mV (See voltage divider recommenda-
tions in
Section
800 mV (See voltage divider recommenda-
tions in
Section
Recommendations
No extra pull-ups required. Connect
straight to FWH/LPC.
No extra pull-ups required. Connect
straight to LPC.
No extra pull-ups required. Connect
straight to FWH/LPC.
Follow vendor recommendation.
HI[11] will be driven by the 6300ESB
(should be terminated low depending
on board trace resistance).
ZCOMP is no longer supported.
1_5).
CC
8.1.4.)
8.1.4.)
Interface not used
May leave as no
connect
May leave as no
connect
May leave as no
connect
May leave as no
connect
Reason/Impact
Reason/Impact
6300ESB integrates 20
K Ω nominal pull-up
resistors on these signal
lines.
6300ESB integrates 20
K Ω nominal pull-up
resistors on these signal
lines.
6300ESB integrates 20
K Ω nominal pull-up
resistors on these signal
lines.

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