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®
Intel
855GME Chipset and Intel
Table 132.
PCI-X Interface Checklist
Checklist Items
PXPCLKO4
PXPCLKO[0:3]
PXPCIRST#
PXIRQ[0:3]#/
GPIO[33:36]
PXPLOCK#
PCIXSBRST#
IDSEL
(On PCI-X
Connector)
3.3 Vaux
(On PCI-X
Connector)
12.4.2
PCI Interface Checklist
Table 133.
PCI Interface Checklist (Sheet 1 of 3)
Checklist Items
DEVSEL#,
FRAME#, IRDY#
PAR
PCICLK
®
6300ESB ICH Embedded Platform Design Guide
Recommendations
No extra pull-ups needed
Ensure this is connected to
PXPCLKI through a 33 Ω resistor
No extra pull-ups needed
Ensure this is connected to the PCI-
X/PCI Device through a 33 Ω
resistor
No extra pull-up needed
Connected to the MCH, External
Controllers (LAN etc.), FWH, SIO
Controllers and Glue Chip
respective reset signals.
8.2 K Ω pull-up resistors to VCC3.3
8.2 K Ω pull-up resistors to VCC3.3
When utilizing this pin ensure the
circuit shown in
Section 9.10.3
implemented
Connected to all devices that reside
on the PCI-X bus.
A 100 Ω series resistor on IDSEL
should be connected to the PCI-X
AD bus.
Leave this unconnected on the PCI-
X slots.
Recommendations
Recommend an 8.2 K Ω pull-up
3.3 or a 2.7 Ω K pull-
resistor to V
CC
up resistor to V
5.
CC
No extra pull-up needed
Ensure this pin is connected to a
33MHz clock output of the clock
generator (CK409) through a 33 Ω
resistor
January 2007
Schematic Checklist Summary
Interface not used
No extra pull-ups needed
Ensure this is connected
to PXPCLKI through a 33
Ω resistor
May leave as no connect
No extra pull-up needed
Connected to the MCH,
External Controllers (LAN
etc.), FWH, SIO
Controllers and Glue Chip
respective reset signals.
May leave as no connect
8.2 K Ω pull-up resistors to
VCC3.3
is
May leave as no connect
N/A
N/A
Interface not used
Recommend an 8.2 K Ω
pull-up resistor to V
3.3
CC
or a 2.7 Ω K pull-up
resistor to V
5.
CC
Recommend an 8.2 K Ω
pull-up resistor to V
3.3
CC
Recommend an 8.2 K Ω
pull-up resistor to V
3.3
CC
Reason/Impact
This signal is actively
driven by the
6300ESB
These signals are
actively driven by the
6300ESB
These signals are
actively driven by the
6300ESB
See PCI-X
specification rev 1.0a
The external circuit
ensures proper
functionality
Improves signal
quality when
connected
6300ESB does not
support PCI-X bus
power management.
Reason/Impact
See PCI 2.2
Component
Specification pull-up
recommendations for
V
3.3 and V
5.
CC
CC
This signal is not 5 V
tolerant
285
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