Intel 855GME Design Manual page 96

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Intel 855GME Chipset and Intel
The eight 10 µF, 0805 capacitors (see
Intel Pentium M/Celeron M processor V
V
CC-CORE
V
CC-CORE
mentioned previously. The positive terminal V
with the 'north corridor' and ground pins of the AF signal row of the Intel Pentium M/Celeron M
processor socket.
To allow good current flow from the SP capacitors to the north side of the V
it is recommended that these eight 10 µF 0805 capacitors be spaced 100 mils apart from each other
even if the motherboard design rules allow tighter spacing. The 100 mil horizontal spacing allows
some V
CC-CORE
connections to internal Layers 3, 5, and 6 as illustrated in
0805 capacitors are placed along the Y signal row of the Intel Pentium M/Celeron M processor
pins on the secondary side below the V
socket cavity. These nine capacitors are spaced 90 mils apart. Each of these nine 0805 capacitors
have a pair of V
The stitching vias connect to the internal ground and V
terminal V
M/Celeron M processor's V
A wide V
connects the 0805 ceramic and SP capacitors that are placed to the north of the Intel Pentium
M/Celeron M processor socket and the nine capacitors that are placed under the shadow of the
socket cavity on the secondary side. The flood is as wide as the whole AF signal row and shall
connect to all the V
The remaining nine (out of 32) 10 µF, 0805 (see
used to decouple the remainder of the 24 V
Pentium M/Celeron M processor socket. These capacitors are placed along signal row G of the
Intel Pentium M/Celeron M processor pins with a 90 mil (or smaller) pitch. Each of the nine
capacitors has a pair of V
of nine capacitors share positive terminals with V
signal row F's V
V pins of signal row F and have their own V
CCP
As shown on the secondary side of
terminal of these nine capacitors to all 24 V
processor pin-map on the south side including the V
The reason for interruption of the V
south sides is to allow the V
Intel Pentium M/Celeron M processor socket.
The primary side view in
V
CC-CORE
of the two clusters of the 24 V
M/Celeron M processor pin-map.
Note: The specific arrangement of the vias for the V
V
CC-CORE
As shown in
V
CC-CORE
secondary sides. The reason for the discontinuity of the V
secondary sides is to facilitate V
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6300ESB ICH Embedded Platform Design Guide
and GND stitching vias on both sides of their terminals. The negative terminals share
and GND stitching via connections with the six 0805 ceramic and SP capacitors
flood between the capacitor ground pads (see
and GND stitching vias next to both their positive and negative terminals.
CC-CORE
and GND stitching vias are shared with the AA signal row of the Intel Pentium
CC-CORE
CC-CORE
power delivery corridor flood on the secondary side of the motherboard
CC-CORE
pins in signal rows Y, W, V, and U as illustrated in
CC-CORE
and GND stitching vias on both sides of their terminals. Five out
CC-CORE
and GND pins. The remaining four capacitors are placed next to the
CC-CORE
corridor connection between the DATA and ADDR sides of the
CCP
Figure 44
stitching vias of the nine capacitors next to their negative terminal to the V
CC-CORE
BGA balls in this cluster of 24 pins to the V
Figure 44, the V
CC-CORE
pins of the Intel Pentium M/Celeron M processor socket on both the primary and
CCP
Figure 45) that are located between the SP capacitors and the
'north corridor' pins also have a pair of
CC-CORE
and GND stitching connections are shared
CC-CORE
Figure
'north corridor' pins under the shadow of the
CC-CORE
CC-CORE
and ground pins.
Figure 44) capacitors on the secondary side are
/GND pin pairs on the south side of the Intel
CC-CORE
and GND stitching via connections with
CC-CORE
vias but do share GND stitching vias.
CC-CORE
Figure 44, a wide V
CC-CORE
pins of the Intel Pentium M/Celeron M
CC-CORE
CC-CORE
flood on the secondary side between the north and
CC-CORE
depicts two wide V
CC-CORE
pins in rows K, J, H, G, F, E, and D of the Intel Pentium
dog bones to allow connection of all
CC-CORE
CC-CORE
floods are isolated between the north and south sides of the
CC-CORE
power delivery. Consequently, this allows the V
corridor pins,
CC-CORE
Figure 45) as well as additional
46. An additional nine 10 µF,
planes respectively. The positive
Figure 45.
flood connects the positive
pins of signal rows K, J, H, and G.
floods that connect from the
CC-CORE
flood shapes on the primary.
floods on the primary and
CCP
pins
corridor