Table of Contents
Advertisement
®
Intel
855GME Chipset and Intel
12.4.11
UART Checklist
Table 142.
UART Checklist
Checklist Items
SIU0_CTS#
SIU1_CTS#
SIU0_DCD#
SIU1_DCD#
SIU0_DSR#
SIU1_DSR#
SIU0_DTR#
SIU1_DTR#
SIU0_RI#
SIU1_RI#
SIU0_RTS#
SIU1_RTS#
SIU0_RXD
SIU1_RXD
SIU0_TXD
SIU1_TXD
UART_CLK
®
6300ESB ICH Embedded Platform Design Guide
Recommendations
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
No extra pull-ups needed
Recommend a 48 MHz clock
source
January 2007
Schematic Checklist Summary
Interface Not Used
May leave as no
connect
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
May leave as no
connect
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
May leave as no
connect
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
Strap Function: TOP Swap
(See the 6300ESB EDS
for more information)
May leave as no
Pull-down to GND to use
connect
TOP Swap function. Value
depends on platform
specifics.
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
May leave as no
connect
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
Driven by the 6300ESB
May leave as no
Do NOT pull down this
connect
signal.
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
May leave as no
connect
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
May leave as no
connect
May leave as no
Internal Pull-up
(15 K Ω − 35 K Ω)
connect
May leave as no
See
Section 9.12
connect
Reason/Impact
293
Advertisement
Table of Contents
