Itp700Flex Design Guidelines For Production Systems - Intel 855GME Design Manual

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Intel 855GME Chipset and Intel
Figure 38. ITP700FLEX Signals Layout Example
Primary Side
4.3.1.4

ITP700FLEX Design Guidelines for Production Systems

For production systems that do not populate the onboard ITP700FLEX debug port connector, the
following guidelines should be followed to ensure that all necessary signals are terminated
properly.
Table 7 summarizes all the signals that require termination when a system does not populate the
ITP700FLEX connector but still implements the routing for all the signals. This includes TDI,
TMS, TRST#, and TCK. Based on the recommended values in this table, the resistor tolerances for
TMS and TCK may be relaxed from ± 1 percent to ± 5 percent to reduce cost. Also, TDO may be
left as a no-connect, thus the 54.9 Ω ± 1 percent pull-up and 22.6 Ω ± 1 percent series resistors
may be removed.
For the ITP700FLEX connector's RESET# input signal, the 220 Ω ± 5 percent resistor should be
removed as well as the 22.6 Ω ± 1 percent series resistor.
The series 33 Ω and 49.9 Ω ± 1 percent parallel termination resistors on the ITP_CLK/ITP_CLK#
differential host clock inputs to the ITP700FLEX connector may also be depopulated for
production systems. The only requirement is that the BIOS should disable the third differential host
clock pair routed from the CK409 clock chip to the ITP700FLEX connector.
Finally, the 150 Ω to 240 Ω pull-up resistor for the DBR# output signal from the ITP700FLEX
connector may or may not be depopulated depending on how it affects the system reset logic to
which it is connected. Thus, it is the responsibility of the system designer to determine whether
termination for DBR# is required or not for a given system implementation. The same is also true
for DBA#, if implemented. This signal is not required and may be left as no connect. However, it is
the responsibility of the system designer to determine whether termination for DBA# is required
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VCCA=1.8 v
1.05 v
January 2007
6300ESB ICH Embedded Platform Design Guide
Secondary Side
1.05 v
150 Ω
TDI
TMS
TRST#
27.4 Ω
680 Ω
39.2 Ω
22.6 Ω
54.9 Ω
1.05 v
TDO
TCK
TDO
FBO
1.05 v
BPM[5:0]#
VTT, VTAP
DBR#
0.1uF
220 Ω
22.6 Ω
RESET#
83