Routing For Thrmdp And Thrmdn; Routing Guidelines For Non-Agtl+ Signals - Intel 810A3 Design Manual

PGA370 Processor Design Guidelines
2.2.2.3 Motherboard Layout Rules for Non-AGTL+ (CMOS) Signals
Non-AGTL+ (CMOS) Signals
Route these signals on any layer or any combination of layers.
Table 2-8. Routing Guidelines for Non-AGTL+ Signals
Signal
A20M#
FERR#
FLUSH#
IERR#
IGNNE#
INIT#
LINT[0] (INTR)
LINT[1] (NMI)
PICD[1:0]
PREQ#
PWRGOOD
SLP#
SMI#
STPCLK
THERMTRIP#
2.2.2.4 THRMDP and THRMDN
These traces (THRMDP and THRMDN) route the processor's thermal diode connections. The
thermal diode operates at very low currents and may be susceptible to crosstalk. The traces should
be routed close together to reduce loop area and inductance (Refer to
Figure 2-2. Routing for THRMDP and THRMDN
•
Rule
— Length Equalization
— Layer
2-8
Trace Width Spacing to Other Traces
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
5 mils
Signal Y
1 -- Maximize (min - 20 mils)
THRMDP
THERMDN
1 -- Maximize (min - 20 mils)
Signal Z
route these traces parallel ±0.5"
route both on the same layer
Trace Length
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
10 mils 1" to 9"
Figure
2 -- Minimize
®
Intel 810A3 Chipset Design Guide
2-2).