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®
Intel
855GME Chipset and Intel
Table 131. GMCH Decoupling Recommendations Checklist (Sheet 2 of 2)
Pin Name
VCC_GPLL
VCC_ADPLLA
VCC_ADPLLB
NOTE: Decoupling guidelines are recommendations based on our reference board design. Customers may
need to take layout and PCB board design into consideration when deciding on overall decoupling
solution.
®
12.4
Intel
Note: Platforms were validated with all interfaces in use.
Caution: Inputs to the 6300ESB must not be left floating unless otherwise noted.
12.4.1
PCI-X Interface Checklist
Table 132.
PCI-X Interface Checklist
Checklist Items
PXAD[32:63]
PXAD[0:31]
PXPCICLK
PXRCOMP
PXACK64#
PXM66EN
Configuration
Connect to
V1P35_GMCH
Connect to
V1P35_GMCH with
filter network
Connect to
V1P35_GMCH with
filter network
6300ESB Checklist
Recommendations
8.2 K Ω pull-up resistors to VCC3.3
No extra pull-ups needed
Ensure this pin is connected to a
66MHz clock output of the clock
generator (CK409) through a 33 Ω
resistor
30 Ω ±1% pull-down resistor to Vss
8.2 K Ω pull-up resistor to VCC3.3
10 K Ω pull-up resistor to VCC3.3
January 2007
®
6300ESB ICH Embedded Platform Design Guide
Schematic Checklist Summary
F
Qty
0.1 µF
1
0.1 µH (1 ohm series on CRB) from
0.1 µF
1
power supply to GMCH pins, with
220 µF
1
caps on GMCH side of inductor.
0.1 µH (1 ohm series on CRB) from
0.1 µF
1
power supply to GMCH pins, with
220 µF
1
caps on GMCH side of inductor.
Interface not used
May leave as no connect
May leave as no connect
Ensure this pin is
connected to a 66MHz
clock output of the clock
generator (CK409)
through a 33 Ω resistor
30 Ω ±1% pull-down
resistor to Vss
8.2 K Ω pull-up resistor to
VCC3.3
10 K Ω pull-up resistor to
VCC3.3
√
Notes
Reason/Impact
Place close to the
6300ESB
See PCI-X
Specification 1.0a for
more
recommendations on
PXM66EN
connections
283
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