Hitachi SH7750 Programming Manual page 305

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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if((FPSCR & ENABLE_V) == 0){
if(sign == 0)
else
}
else fpu_exception_trap();
}
FTRC Special Cases
FRn,DRn
NORM
FTRC
TRC
(FRn,DRn)
Note: When DN = 1, the value of a denormalized number is treated as 0.
Possible Exceptions:
• Invalid operation
*FPUL = 0x7fffffff;
*FPUL = 0x80000000;
Positive
Out of
+0
–0
Range
0
0
Invalid
+MAX
Negative
Out of
Range
+INF
Invalid
Invalid
Invalid
–MAX
+MAX
–MAX
Rev. 2.0, 03/99, page 291 of 396
–INF
qNaN
sNaN
Invalid
Invalid
–MAX
–MAX

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