Jsr - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.49

JSR

Branch to Subroutine Procedure
Format
JSR @Rn
Description
This instruction makes a delayed branch to the subroutine procedure at the specified address after
execution of the following instruction. Return address (PC + 4) is saved in PR, and a branch is
made to the address indicated by general register Rn. JSR is used in combination with RTS for
subroutine procedure calls.
Notes
As this is a delayed branch instruction, the instruction following this instruction is executed before
the branch destination instruction.
Interrupts are not accepted between this instruction and the following instruction. If the following
instruction is a branch instruction, it is identified as a slot illegal instruction.
Operation
JSR(int n)/* JSR @Rn */
{
unsigned int temp;
temp=PC;
PR=PC+4;
PC=R[n];
Delay_Slot(temp+2);
}
Rev. 2.0, 03/99, page 296 of 396
Jump to SubRoutine
Summary of Operation
PC+4 → PR, Rn → PC
Branch Instruction
Delayed Branch Instruction
Instruction Code
0100nnnn00001011 2
Execution
States
T Bit

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