Clrmac - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
Hide thumbs Also See for SH7750:
Table of Contents

Advertisement

10.13

CLRMAC

MAC Register Clear
Format
CLRMAC
Description
This instruction clears the MACH and MACL registers.
Operation
CLRMAC( )
/* CLRMAC */
{
MACH=0;
MACL=0;
PC+=2;
}
Example
CLRMAC
MAC.W
@R0+,@R1+
MAC.W
@R0+,@R1+
Rev. 2.0, 03/99, page 222 of 396
CleaR MAC register
Summary of Operation
0 → MACH, MACL
;Clear MAC register to initialize.
;Multiply-and-accumulate operation
;
System Control Instruction
Instruction Code
0000000000101000 1
Execution
States
T Bit

Advertisement

Table of Contents
loading

Table of Contents