Hitachi SH7750 Programming Manual page 156

Table 7.7 Branch Instructions
Instruction
BF label
BF/S label
BT label
BT/S label
BRA label
BRAF Rn
BSR label
BSRF Rn
JMP @Rn
JSR @Rn
RTS
Rev. 2.0, 03/99, page 142 of 396
Operation
When T = 0, disp × 2 + PC +
4 → PC
When T = 1, nop
Delayed branch; when T = 0,
disp × 2 + PC + 4 → PC
When T = 1, nop
When T = 1, disp × 2 + PC +
4 → PC
When T = 0, nop
Delayed branch; when T = 1,
disp × 2 + PC + 4 → PC
When T = 0, nop
Delayed branch, disp × 2 +
PC + 4 → PC
Rn + PC + 4 → PC
Delayed branch, PC + 4 → PR,
disp × 2 + PC + 4 → PC
Delayed branch, PC + 4 → PR,
Rn + PC + 4 → PC
Delayed branch, Rn → PC
Delayed branch, PC + 4 → PR,
Rn → PC
Delayed branch, PR → PC
Instruction Code
10001011dddddddd —
10001111dddddddd —
10001001dddddddd —
10001101dddddddd —
1010dddddddddddd —
0000nnnn00100011 —
1011dddddddddddd —
0000nnnn00000011 —
0100nnnn00101011 —
0100nnnn00001011 —
0000000000001011 —
Privileged T Bit
—
—
—
—
—
—
—
—
—
—
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