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Hitachi SH7750 Programming Manual page 130

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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•
When the UBDE bit in the BRCR register is set to 1 and the user break debug support
function* is used, do not locate a BT, BF, BT/S, BF/S, BRA, or BSR instruction at the address
indicated by the DBR register.
Note: * See section 20.4 in the SH-4 Hardware manual.
Rev. 2.0, 03/99, page 116 of 396

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