Lds - Hitachi SH7750 Programming Manual

10.51

LDS

Load to FPU
System Register
Format
LDS Rm,FPUL
LDS.L @Rm+,FPUL
LDS Rm,FPSCR
LDS.L @Rm+,FPSCR (Rm) → FPSCR, Rm+4 → Rm 0100mmmm01100110 1
Description
This instruction loads the source operand into FPU system registers FPUL and FPSCR.
Operation
#define FPSCR_MASK 0x003FFFFF
LDSFPUL(int m, int *FPUL)
{
*FPUL=R[m];
PC+=2;
}
LDSMFPUL(int m, int *FPUL)
{
*FPUL=Read_Long(R[m]);
R[m]+=4;
PC+=2;
}
LDSFPSCR(int
{
FPSCR=R[m] & FPSCR_MASK;
PC+=2;
}
LDSMFPSCR(int
{
FPSCR=Read_Long(R[m]) & FPSCR_MASK;
Rev. 2.0, 03/99, page 302 of 396
LoaD to FPU System
register
Summary of Operation
Rm → FPUL
(Rm) → FPUL, Rm+4 → Rm
Rm → FPSCR
m) /* LDS Rm,FPSCR
m) /* LDS.L @Rm+,FPSCR
System Control Instruction
Instruction Code
0100mmmm01011010 1
0100mmmm01010110 1
0100mmmm01101010 1
/* LDS Rm,FPUL
/* LDS.L @Rm+,FPUL
*/
*/
Execution
States
*/
*/
T Bit
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