Hitachi SH7750 Programming Manual page 10

6.6.2 Pair Single-Precision Data Transfer .................................................................... 128
Section 7 Instruction Set
7.1 Execution Environment .................................................................................................... 129
7.2 Addressing Modes ............................................................................................................ 131
7.3 Instruction Set................................................................................................................... 135
Section 8 Pipelining
8.1 Pipelines............................................................................................................................ 149
8.2 Parallel-Executability ....................................................................................................... 156
8.3 Execution Cycles and Pipeline Stalling ............................................................................ 160
Section 9 Power-Down Modes
9.1 Overview .......................................................................................................................... 177
9.1.1 Types of Power-Down Modes ............................................................................. 177
9.1.2 Register Configuration......................................................................................... 179
9.2 Register Descriptions........................................................................................................ 179
9.2.1 Standby Control Register (STBCR) .................................................................... 179
9.2.2 Peripheral Module Pin High Impedance Control................................................. 181
9.2.3 Peripheral Module Pin Pull-Up Control .............................................................. 182
9.2.4 Standby Control Register 2 (STBCR2) ............................................................... 182
9.3 Sleep Mode ....................................................................................................................... 183
9.3.1 Transition to Sleep Mode..................................................................................... 183
9.3.2 Exit from Sleep Mode.......................................................................................... 183
9.4 Deep Sleep Mode.............................................................................................................. 183
9.4.1 Transition to Deep Sleep Mode ........................................................................... 183
9.4.2 Exit from Deep Sleep Mode ................................................................................ 183
9.5 Standby Mode................................................................................................................... 184
9.5.1 Transition to Standby Mode ................................................................................ 184
9.5.2 Exit from Standby Mode ..................................................................................... 185
9.5.3 Clock Pause Function .......................................................................................... 185
9.6 Module Standby Function................................................................................................. 186
9.6.1 Transition to Module Standby Function .............................................................. 186
9.6.2 Exit from Module Standby Function ................................................................... 186
Section 10 Instruction Descriptions
10.1 ADD ............ ADD binary ............................................Arithmetic Instruction ........... 200
10.2 ADDC ......... ADD with Carry .....................................Arithmetic Instruction ........... 202
10.3 ADDV ......... ADD with (V flag) overflow check ........Arithmetic Instruction ........... 203
10.4 AND ............ AND logical.............................................Logical Instruction ................ 205
10.5 BF ................ Branch if False ........................................Branch Instruction................. 207
10.6 BF/S ............ Branch if False with delay Slot ...............Branch Instruction................. 209
10.7 BRA ............ BRAnch ..................................................Branch Instruction................. 211
................................................................................................... 129
............................................................................................................ 149
........................................................................................ 177
............................................................................... 187
Rev. 2.0, 03/99, page x of 13