Mac.l - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.54

MAC.L

Double-Precision
Multiply-and-Accumulate
Operation
Format
MAC.L @Rm+,@Rn+
Description
This instruction performs signed multiplication of the 32-bit operands whose addresses are the
contents of general registers Rm and Rn, adds the 64-bit result to the MAC register contents, and
stores the result in the MAC register. Operands Rm and Rn are each incremented by 4 each time
they are read.
If the S bit is 0, the 64-bit result is stored in the linked MACH and MACL registers.
If the S bit is 1, the addition to the MAC register contents is a saturation operation at the 48th bit
from the LSB. In a saturation operation, only the lower 48 bits of the MAC register are valid, and
the result range is limited to H'FFFF800000000000 (minimum value) to H'00007FFFFFFFFFFF
(maximum value).
Operation
MACL(long m, long n)
{
unsigned long RnL,RnH,RmL,RmH,Res0,Res1,Res2;
unsigned long temp0,temp1,temp2,temp3;
long tempm,tempn,fnLmL;
tempn=(long)Read_Long(R[n]);
R[n]+=4;
tempm=(long)Read_Long(R[m]);
R[m]+=4;
if ((long)(tempn^tempm)<0) fnLmL=-1;
else fnLmL=0;
Rev. 2.0, 03/99, page 308 of 396
Multiply and ACcumulate
Long
Summary of Operation
Signed,
(Rn) × (Rm) + MAC → MAC
Rn + 4 → Rn, Rm + 4 → Rm
/* MAC.L @Rm+,@Rn+ */
Arithmetic Instruction
Instruction Code
0000nnnnmmmm1111 2–5
Execution
States
T Bit

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