Hitachi SH7750 Programming Manual page 224

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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Operation
BFS(int d)
{
int disp;
unsigned int temp;
temp=PC;
if ((d&0x80)==0)
disp=(0x000000FF & d);
else
disp=(0xFFFFFF00 | d);
if (T==0)
PC=PC+4+(disp<<1);
else PC+=4;
Delay_Slot(temp+2);
}
Example
CLRT
BT/S
TRGET_T
NOP
BF/S
TRGET_F
ADD
R0,R1
NOP
TRGET_F:
Rev. 2.0, 03/99, page 210 of 396
/* BFS disp */
;Normally T = 0
;T = 0, so branch is not taken.
;
;T = 0, so branch to TRGET.
;Executed before branch.
;
;← BF/S instruction branch destination

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