Fcnvds; Double To Single Precision - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.28

FCNVDS

Double-Precision
to Single-Precision
Conversion
PR
Format
0
1
FCNVDS DRm,FPUL
Description
When FPSCR.PR = 1: This instruction converts the double-precision floating-point number in
DRm to a single-precision floating-point number, and stores the result in FPUL.
When FPSCR.enable.O/U/I is set, an FPU exception trap is generated regardless of whether or not
an exception has occurred. When an exception occurs, correct exception information is reflected in
FPSCR.cause and FPSCR.flag, and FPUL is not updated. Appropriate processing should therefore
be performed by software.
Operation
void FCNVDS(int m, float *FPUL){
case((FPSCR.PR){
0:
1:
}
}
void fcnvds(int m, float *FPUL)
{
pc += 2;
clear_cause();
case(data_type_of(m, *FPUL)){
NORM
PZERO :
NZERO :
DENORM : set_E();
PINF
NINF
Rev. 2.0, 03/99, page 250 of 396
Floating-point CoNVert

Double to Single precision

Summary of Operation
(float)DRm → FPUL
undefined_operation();
fcnvds(m, *FPUL);
:
normal_ fcnvds(m, *FPUL);
:
*FPUL = 0x7f800000; break;
:
*FPUL = 0xff800000; break;
Floating-Point Instruction
Instruction Code
1111mmm010111101 2
/* reserved */
break;
/* FCNVDS */
break;
Execution
States
T Bit

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