10.102 Xor - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.102 XOR

Exclusive
Logical OR
Format
XOR
Rm,Rn
XOR
#imm,R0
XOR.B #imm,@(R0,GBR)
Description
This instruction exclusively ORs the contents of general registers Rn and Rm, and stores the result
in Rn.
This instruction can be used to exclusively OR register R0 contents with zero-extended 8-bit
immediate data, or, in indexed GBR indirect addressing mode, to exclusively OR 8-bit memory
with 8-bit immediate data.
Operation
XOR(long m, long n) /* XOR Rm,Rn */
{
R[n]^=R[m];
PC+=2;
}
XORI(long i)
{
R[0]^=(0x000000FF & (long)i);
PC+=2;
}
XORM(long i)
{
int temp;
temp=(long)Read_Byte(GBR+R[0]);
temp^=(0x000000FF &(long)i);
Rev. 2.0, 03/99, page 388 of 396
eXclusive OR logical
Summary of Operation Instruction Code
Rn ^ Rm → Rn
R0 ^ imm → R0
(R0+GBR)^imm →
(R0+GBR)
/* XOR #imm,R0 */
/* XOR.B #imm,@(R0,GBR) */
Logical Instruction
0010nnnnmmmm1010 1
11001010iiiiiiii 1
11001110iiiiiiii 4
Execution
States
T Bit

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