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Hitachi SH7750 Programming Manual page 161

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series

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Table of Contents

Table 7.12 Floating-Point Graphics Acceleration Instructions

@(R0,Rm),DRn

XDm,@(R0,Rn)

(Rm) → XDn, Rm + 8 → Rm

(R0 + Rm) → DRn

Rn – 8 → Rn, XDm → (Rn)

XDm → (R0+Rn)

inner_product [FVm, FVn] →

transform_vector [XMTRX, FVn]

~FPSCR.FR → SPFCR.FR

~FPSCR.SZ → SPFCR.SZ

Instruction Code

1111nnn1mmm01100 —

1111nnn0mmm11100 —

1111nnn1mmm11100 —

1111nnn1mmmm1000 —

1111nnn1mmmm1001 —

1111nnn1mmmm0110 —

1111nnnnmmm11010 —

1111nnnnmmm11011 —

1111nnnnmmm10111 —

1111nnmm11101101 —

1111nn0111111101 —

1111101111111101 —

1111001111111101 —

Rev. 2.0, 03/99, page 147 of 396