Negc - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.67

NEGC

Sign Inversion with Borrow
Format
NEGC Rm,Rn
Description
This instruction subtracts the contents of general register and the T bit from 0 and stores the result
in Rn. A borrow resulting from the operation is reflected in the T bit. The NEGC instruction is
used for sign inversion of a value exceeding 32 bits.
Operation
NEGC(long m, long n) /* NEGC Rm,Rn */
{
unsigned long temp;
temp=0-R[m];
R[n]=temp-T;
if (0<temp) T=1;
else T=0;
if (temp<R[n]) T=1;
PC+=2;
}
Example
CLRT
NEGC
R1,R1
NEGC
R0,R0
Rev. 2.0, 03/99, page 336 of 396
NEGate with Carry
Summary of Operation
0 – Rm – T → Rn,
borrow → T
;Sign inversion of R0:R1 (64 bits)
;Before execution R1 = H'00000001, T = 0
;After execution
;Before execution R0 = H'00000000, T = 1
;After execution
Arithmetic Instruction
Instruction Code
0110nnnnmmmm1010 1
R1 = H'FFFFFFFF, T = 1
R0 = H'FFFFFFFF, T = 1
Execution
States
T Bit
Borrow

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