Lds - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.52

LDS

Load to System
Register
Format
LDS
Rm,MACH
LDS
Rm,MACL
LDS
Rm,PR
LDS.L @Rm+,MACH
LDS.L @Rm+,MACL
LDS.L @Rm+,PR
Description
Stores the source operand into the system registers MACH, MACL, or PR.
Operation
LDSMACH(int m)
{
MACH=R[m];
PC+=2;
}
LDSMACL(int m)
{
MACL=R[m];
PC+=2;
}
LDSPR(int m)
{
PR=R[m];
PC+=2;
}
LDSMMACH(int m)
{
Rev. 2.0, 03/99, page 304 of 396
LoaD to System register
Summary of Operation
Rm → MACH
Rm → MACL
Rm→ PR
(Rm) → MACH, Rm + 4 → Rm 0100mmmm00000110 1
(Rm) → MACL, Rm + 4 → Rm 0100mmmm00010110 1
(Rm) → PR, Rm + 4 → Rm
/* LDS Rm,MACH */
/* LDS Rm,MACL */
/* LDS Rm,PR */
/* LDS.L @Rm+,MACH */
System Control Instruction
Instruction Code
0100mmmm00001010 1
0100mmmm00011010 1
0100mmmm00101010 2
0100mmmm00100110 2
Execution
States
T Bit

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