Hitachi SH7750 Programming Manual page 281

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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case PINF :
case NINF : switch (data_type_of(m)){
case PZERO:
case NZERO:invalid(n);
default: switch (data_type_of(n)){
case DENORM: set_E();
case qNaN:
default:
}
}
}
}
void normal_fmac(int m,n)
{
union {
int double x;
int l[4];
}
dstx,tmpx;
float dstf,srcf;
if((data_type_of(n) == PZERO)|| (data_type_of(n) == NZERO))
srcf = 0.0; /* flush denormalized value */
else
srcf = FR[n];
tmpx.x = FR[0]; /* convert single to int double */
tmpx.x *= FR[m]; /* exact product */
dstx.x = tmpx.x + srcf;
if(((dstx.x == srcf) && (tmpx.x != 0.0)) ||
((dstx.x == tmpx.x) && (srcf != 0.0))) {
set_I();
if(sign_of(0)^ sign_of(m)^ sign_of(n))
dstx.l[3] -= 1; /* correct result */
if(dstx.l[3] == 0xffffffff) dstx.l[2] -= 1;
if(dstx.l[2] == 0xffffffff) dstx.l[1] -= 1;
if(dstx.l[1] == 0xffffffff) dstx.l[0] -= 1;
}
else
}
if((dstx.l[1] & 0x01ffffff) || dstx.l[2] || dstx.l[3]) set_I();
qnan(n);
inf(n,sign_of(0)^sign_of(m)^sign_of(n));break
break;
break;
dstx.l[3] |= 1;
break;
break;
break;
Rev. 2.0, 03/99, page 267 of 396
{

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