Extu - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.24

EXTU

Zero Extension
Format
EXTU.B
Rm,Rn
EXTU.W Rm,Rn
Description
This instruction zero-extends the contents of general register Rm and stores the result in Rn.
For a byte specification, 0 is transferred to Rn bits 8 to 31. For a word specification, 0 is
transferred to Rn bits 16 to 31.
Operation
EXTUB(long m, long n)
{
R[n]=R[m];
R[n]&=0x000000FF;
PC+=2;
}
EXTUW(long m, long n)
{
R[n]=R[m];
R[n]&=0x0000FFFF;
PC+=2;
}
Example
EXTU.B
R0,R1
EXTU.W
R0,R1
EXTend as Unsigned
Summary of Operation
Rm zero-extended from
byte → Rn
Rm zero-extended from
word → Rn
/* EXTU.B Rm,Rn */
/* EXTU.W Rm,Rn */
;Before execution R0 = H'FFFFFF80
;After execution
;Before execution R0 = H'FFFF8000
;After execution
Arithmetic Instruction
Instruction Code
0110nnnnmmmm1100 1
0110nnnnmmmm1101 1
R1 = H'00000080
R1 = H'00008000
Rev. 2.0, 03/99, page 243 of 396
Execution
States
T Bit

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