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Description
This instruction stores control register SR, GBR, VBR, SSR, SPC, SGR, DBR or Rm_BANK (m
= 0–7) in the destination.
Rm_BANK operands are specified by the RB bit of the SR register:
when the RB bit is 1 Rm_BANK0 is accessed,
when the RB bit is 0 Rm_BANK1 is accessed.
Notes
STC/STC.L can only be used in privileged mode excepting STC GBR, Rn/STC.L GBR, @-Rn.
Use of these instructions in user mode will cause illegal instruction exceptions.
Operation
STCSR(int n)
{
R[n]=SR;
PC+=2;
}
STCGBR(int n)
{
R[n]=SGR;
PC+=2;
}
STCVBR(int n)
{
R[n]=VBR;
PC+=2;
}
STCSSR(int n)
{
R[n]=SSR;
PC+=2;
}
/* STC SR,Rn : Privileged */
/* STC GBR,Rn */
/* STC VBR,Rn : Privileged */
/* STC SSR,Rn : Privileged */
Rev. 2.0, 03/99, page 369 of 396
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