Addc - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.2

ADDC

Binary Addition
with Carry
Format
ADDC Rm,Rn
Description
This instruction adds together the contents of general registers Rn and Rm and the T bit, and stores
the result in Rn. A carry resulting from the operation is reflected in the T bit. This instruction is
used for additions exceeding 32 bits.
Operation
ADDC(long m, long n)
{
unsigned long tmp0,tmp1;
tmp1=R[n]+R[m];
tmp0=R[n];
R[n]=tmp1+T;
if (tmp0>tmp1) T=1;
else T=0;
if (tmp1>R[n]) T=1;
PC+=2;
}
Example
CLRT
ADDC
R3,R1
ADDC
R2,R0
Rev. 2.0, 03/99, page 202 of 396
ADD with Carry
Summary of Operation
Rn+Rm+T → Rn, carry → T 0011nnnnmmmm1110 1
/* ADDC Rm,Rn */
;R0:R1(64 bits) + R2:R3(64 bits) = R0:R1(64 bits)
;Before execution T = 0, R1 = H'00000001, R3 = H'FFFFFFFF
;After execution
;Before execution T = 1, R0 = H'00000000, R2 = H'00000000
;After execution
Instruction Code
T = 1, R1 = H'00000000
T = 0, R0 = H'00000001
Arithmetic Instruction
Execution
States
T Bit
Carry

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