Bra - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.7

BRA

Unconditional Branch
Format
BRA label
Description
This is an unconditional branch instruction. The branch destination is address (PC + 4 +
displacement × 2). The PC source value is the BRA instruction address. As the 12-bit
displacement is multiplied by two after sign-extension, the branch destination can be located in the
range from –4096 to +4094 bytes from the BRA instruction. If the branch destination cannot be
reached, this branch can be performed with a JMP instruction.
Notes
As this is a delayed branch instruction, the instruction following this instruction is executed before
the branch destination instruction.
Interrupts are not accepted between this instruction and the following instruction. If the following
instruction is a branch instruction, it is identified as a slot illegal instruction.
Operation
BRA(int d)
{
int disp;
unsigned int temp;
temp=PC;
if ((d&0x800)==0)
disp=(0x00000FFF & d);
else
disp=(0xFFFFF000 | d);
PC=PC+4+(disp<<1);
Delay_Slot(temp+2);
}
BRAnch
Summary of Operation
PC+4+disp×2 → PC
/* BRA disp */
Branch Instruction
Delayed Branch Instruction
Instruction Code
1010dddddddddddd 1
Rev. 2.0, 03/99, page 211 of 396
Execution
States
T Bit

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