Mulu.w - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.65

MULU.W

Unsigned Multiplication
Format
MULU.W Rm,Rn
MULU
Rm,Rn
Description
This instruction performs 16-bit multiplication of the contents of general registers Rn and Rm, and
stores the 32-bit result in the MACL register. The multiplication is performed as an unsigned
arithmetic operation. The contents of MACH are not changed.
Operation
MULU(long m, long n) /* MULU Rm,Rn
{
MACL=((unsigned long)(unsigned short)R[n]*
(unsigned long)(unsigned short)R[m];
PC+=2;
}
Example
MULU.W
R0,R1
STS
MACL,R0
Rev. 2.0, 03/99, page 334 of 396
MULtiply as Unsigned Word
Summary of Operation
Unsigned, Rn × Rm → MACL
;Before execution R0 = H'00000002, R1 = H'FFFFAAAA
;After execution
;Get operation result
Arithmetic Instruction
Instruction Code
0010nnnnmmmm1110 2–5
*/
MACL = H'00015554
Execution
States
T Bit

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