Hitachi SH7750 Programming Manual page 202

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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unsigned char
unsigned short Read_Word(unsigned long Addr);
unsigned long
These reflect the respective sizes of address Addr. A word read from other than a 2n address, or a
longword read from other than a 4n address, will be detected as an address error.
unsigned char Write_Byte(unsigned long Addr, unsigned long Data);
unsigned short Write_Word(unsigned long Addr, unsigned long Data);
unsigned long Write_Long(unsigned long Addr, unsigned long Data);
These write data Data to address Addr, using the respective sizes. A word write to other than a 2n address,
or a longword write to other than a 4n address, will be detected as an address error.
Delay_Slot(unsigned long Addr);
Shifts to execution of the slot instruction at address (Addr).
unsigned long R[16];
unsigned long SR,GBR,VBR;
unsigned long MACH,MACL,PR;
unsigned long PC;
Registers
struct SR0 {
unsigned long dummy0:22;
unsigned long
unsigned long
unsigned long
unsigned long dummy1:2;
unsigned long
unsigned long
};
SR structure definitions
define M ((*(struct SR0 *)(&SR)).M0)
#define Q ((*(struct SR0 *)(&SR)).Q0)
#define S ((*(struct SR0 *)(&SR)).S0)
#define T ((*(struct SR0 *)(&SR)).T0)
Definitions of bits in SR
Rev. 2.0, 03/99, page 188 of 396
Read_Byte(unsigned long Addr);
Read_Long(unsigned long Addr);
M0:1;
Q0:1;
I0:4;
S0:1;
T0:1;

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