Mov - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.59

MOV

Structure Data
Transfer
Format
MOV.B R0,@(disp,Rn)
MOV.W R0,@(disp,Rn)
MOV.L Rm,@(disp,Rn)
MOV.B @(disp,Rm),R0
MOV.W @(disp,Rm),R0
MOV.L @(disp,Rm),Rn
Description
This instruction transfers the source operand to the destination. It is ideal for accessing data inside
a structure or stack. Byte, word, or longword can be specified as the data size, but with byte or
word data the register is always R0.
If the data is byte-size, the 4-bit displacement is only zero-extended, so a range up to +15 bytes
can be specified. If the data is word-size, the 4-bit displacement is multiplied by two after zero-
extension, enabling a range up to +30 bytes to be specified. With longword data, the 4-bit
displacement is multiplied by four after zero-extension, enabling a range up to +60 bytes to be
specified. If a memory operand cannot be reached, the previously described @(R0,Rn) mode must
be used.
When the source operand is memory, the loaded data is sign-extended to longword before being
stored in the register.
Notes
When loading byte or word data, the destination register is always R0. Therefore, if the following
instruction attempts to reference R0, it is kept waiting until completion of the load instruction.
This allows optimization by changing the order of instructions.
MOV.B
AND
ADD
Rev. 2.0, 03/99, page 326 of 396
MOVe structure data
Summary of Operation
R0 → (disp+Rn)
R0 → (disp×2+Rn)
Rm → (disp×4+Rn)
(disp+Rm) → sign
extension R0
(disp×2+Rm) → sign
extension R0
(disp×4+Rm) → Rn
@(2,R1),R0
#80,R0
#20,R1
Data Transfer Instruction
Instruction Code
10000000nnnndddd 1
10000001nnnndddd 1
0001nnnnmmmmdddd 1
10000100mmmmdddd 1
10000101mmmmdddd 1
0101nnnnmmmmdddd 1
MOV.B
@(2,R1),R0
ADD
#20,R1
AND
#80,R0
Execution
States
T Bit

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