Notes
With the exception of LDC Rm,GBR and LDC.L @Rm+,GBR, the LDC/LDC.L instructions are
privileged instructions and can only be used in privileged mode. Use in user mode will cause an
illegal instruction exception. However, LDC Rm,GBR and LDC.L @Rm+,GBR can also be used
in user mode.
With the LDC Rm, Rn_BANK and LDC.L @Rm, Rn_BANK instructions, Rn_BANK0 is
accessed when the RB bit in the SR register is 1, and Rn_BANK1 is accessed when this bit is 0.
Operation
LDCSR(int m)
{
SR=R[m]&0x700083F3;
PC+=2;
}
LDCGBR(int m)
{
GBR=R[m];
PC+=2;
}
LDCVBR(int m)
{
VBR=R[m];
PC+=2;
}
LDCSSR(int m)
{
SSR=R[m],
PC+=2;
}
LDCSPC(int m)
{
SPC=R[m];
/* LDC Rm,SR : Privileged */
/* LDC Rm,GBR */
/* LDC Rm,VBR : Privileged */
/* LDC Rm,SSR : Privileged */
/* LDC Rm,SPC : Privileged */
Rev. 2.0, 03/99, page 299 of 396