Div0S - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.17

DIV0S

Initialization for
Signed Division
Format
Summary of Operation
MSB of Rn → Q,
DIV0S Rm,Rn
MSB of Rm → M,
M^Q → T
Description
This instruction performs initial settings for signed division. This instruction is followed by a
DIV1 instruction that executes 1-digit division, for example, and repeated divisions are executed
to find the quotient. See the description of the DIV1 instruction for details.
Operation
DIV0S(long m, long n)
{
if ((R[n] & 0x80000000)==0) Q=0;
else Q=1;
if ((R[m] & 0x80000000)==0) M=0;
else M=1;
T=!(M==Q);
PC+=2;
}
Example
See the examples for the DIV1 instruction.
DIVide (step 0) as Signed
/* DIV0S Rm,Rn */
Arithmetic Instruction
Instruction Code
0010nnnnmmmm0111 1
Rev. 2.0, 03/99, page 229 of 396
Execution
States
T Bit
Result of
calculation

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