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Communication Processor Module
16.10.9 Using the USB Controller as a Host
This section describes the full implementation of host mode, which is available for Revision
B (and later) of the MPC823e silicon. Earlier revisions of the MPC823e only support
high-speed (12Mbs) host mode operation.
To configure the USB controller as a host, the HOST bit in the USB mode register must be
set. In this mode, the registers and memory structures associated with endpoint 0 are used
to control host transmission and reception. The other endpoints are typically unused, except
for testing purposes (loop-back).
The programming model for the host controller is similar to the one used in function mode.
You must set the MF bit in the endpoint 0 configuration register to allow SETUP/OUT tokens
and DATA0/DATA1 packets to be transmitted back-to-back. The tokens must be prepared
in a separate buffer descriptor. The software must append the CRC5 as part of the
transmitted data because the CPM currently does not support it.
The USB host controller must be clocked as a high-speed function (48MHz reference clock).
The LSP bit in the transmit buffer descriptor indicates whether or not the following
transaction is with a low-speed function. If it is set, the USB controller will automatically
generate the PRE token before each transmitted packet and change the transmit rate to low
speed. After the transaction is completed, the host returns to full-speed operation. The LSP
bit must be set only for buffer descriptors associated with tokens.
16.10.9.1 USB CONTROLLER INITIALIZATION EXAMPLE (HOST MODE). The
following is an local loopback example initialization sequence for the USB controller
operating in host mode. It can be used to set up endpoints 0 and 1 to fill up transmit FIFOs
to demonstrate an IN token transaction.
1. Write 0x00010000 to the BRGC1 register for division factor 1 to produce 48MHz,
assuming the system clock is 48MHz.
2. Clear the DR14 and DR15 bits of the PADIR. Set the DD14 and DD15 bits of the
PAPAR to select the USBRXD and USBOE pins.
3. Clear the DR10 and DR11 bits of the PCDIR, the DD10 and DD11 bits of the PCPAR,
and set the CD1 and CTS1 bits of the PCSO to select the USBRXP and USBRXN pins.
4. Set the DR6 and DR7 bits of the PCDIR and the DD6 and DD7 bits of the PCPAR to
select the USBTXP and USBTXN pins.
5. Write 0x0000 to initialize the FRAME_N parameter.
6. Write DPRAM+500 to the EP0PTR and DPRAM+520 to the EP1PTR to set up the
endpoint 0 and 1 pointers.
7. Write 0xB8000003 to DPRAM+20 to set up the various status and DATA LENGTH
fields of the endpoint 0 TX buffer descriptor.
8. Write DPRAM+200 to DPRAM+24 to set up the TX DATA BUFFER POINTER field of
the endpoint 0 TX buffer descriptor.
9. Write BC800003 to DPRAM +28 to set up the status and DATA LENGTH fields of the
endpoint 1 TX buffer descriptor.
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MPC823e REFERENCE MANUAL
MOTOROLA
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