Motorola MPC823e Reference Manual page 1269

Microprocessor for mobile computing
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or
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
MOTOROLA
or
rA,rS,rB (Rc = 0)
or.
rA,rS,rB (Rc = 1)
3
4
5
6
7
19
20
21
22
23
OR
rA ← (rS) | (rB)
The contents of rS are ORed with the contents of rB and the
result is placed into rA. The simplified mnemonic mr (shown
below) demonstrates the use of the or instruction to move
register contents.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
Simplified mnemonics:
mr
rA,rS
equivalent to
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—or
8
9
10
11
12
S
24
25
26
27
28
444
or
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
RC
rA,rS,rS
FORM
X
B-111

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