Motorola MPC823e Reference Manual page 1289

Microprocessor for mobile computing
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sth
Assembler Syntax
BIT
0
1
2
FIELD
44
BIT
16
17
18
FIELD
Definition
Operation
Description
MOTOROLA
sth
rS,d(rA)
3
4
5
6
7
19
20
21
22
23
d
Store Half Word
if rA = 0 then b ← 0
b ← (rA)
else
EA ← b + EXTS(d)
MEM(EA, 2) ← rS[16-31]
EA is the sum (rA|0) + d. The contents of the low-order 16 bits
of rS are stored into the half word in memory addressed by EA.
Other registers altered:
None
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—sth
8
9
10
11
12
S
24
25
26
27
28
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
FORM
D
B-131

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