Motorola MPC823e Reference Manual page 1341

PowerPC Operating Environment Architecture
7-6
(Book 3),
PowerPC Operating Environment Architecture
(Book 3), storage protection,
PowerPC User Instruction Set Architecture
(Book 1)
branch instructions,
branch processor,
computation modes,
7-2
exceptions,
fixed point-processor,
instruction classes,
load/store processor,
reserved fields,
PowerPC User Instruction Set Architecture
7-1
(Book 1),
PowerPC Virtual Environment Architecture
(Book 2)
operand placement effects,
storage control instructions,
storage model,
7-6
timebase,
PowerPC Virtual Environment Architecture
7-4
(Book 2),
PowerPC User Instruction Set Architecture
Book 1
instruction fetching,
16-290
PPM (definition),
16-269
PPP (definition),
16-358
PRE token,
16-212
preamble, sending,
6-20
processor, state of,
20-2
program flow tracking,
program trace cycle (definition),
program trace, reconstructing,
16-286
Programming
programming
CPM interrupt controller,
10-3
data cache,
20-41
development port,
16-27
DSP,
general circuit interface,
HDLC bus controller,
16-148
IDL interface,
9-4
instruction cache,
memory management unit,
17-9
PCMCIA,
SCC2 in Ethernet mode example,
SCC2 in IrDA mode,
SCC2 in low-speed IrDA mode example,
297
SCC2 in middle-speed IrDA mode example,
298
SCC2 in Transparent mode example,
SCCx in AppleTalk mode,
MOTOROLA
7-7
7-2
7-2
7-1
7-2
7-1
7-3
7-1
7-5
7-5
7-4
7-2
20-3
20-2
16-507
16-152
16-264
11-15
16-348
16-294
16-
16-317
16-268
MPC823e REFERENCE MANUAL
SCCx in ASYNC HDLC mode example,
286
SCCx in ASYNC HDLC mode,
SCCx in Ethernet mode,
SCCx in HDLC mode example,
256
SCCx in HDLC mode,
SCCx in UART mode example,
SCCx in UART mode S-record example,
232
SCCx in UART mode,
SCCx Transparent mode patterns,
serial interface RAM,
serial peripheral interface master example,
453
serial peripheral interface slave example,
454
serial peripheral interface,
SIU interrupt controller,
SMC in Transparent mode NMSI example,
423
SMC in Transparent mode TSA example,
424
SMC in UART mode example,
SMC in UART mode,
system interface unit,
time-slot assigner,
TLB replacement counter,
universal serial bus,
user-programmable machines,
video controller,
programming the SPLL,
promiscuous operation,
protocols
SCC2 in IrDA mode,
SCCx in ASYNC HDLC mode,
SCCx in Ethernet mode,
SCCx in HDLC mode,
SCCx in Transparent mode,
SCCx in UART mode,
SMC in GCI mode,
SMC in Transparent mode,
SMC in UART mode,
protocols of the SCCs,
protocols, asynchronous,
protocols, switching,
protocols, synchronous,
17-11
PSCR,
16-176
PSMR,
PSMR–ASYNC HDLC,
PSMR–Ethernet,
16-
PSMR–HDLC,
PSMR–SCC UART,
2-8 13-4
PTR, ,
PTS (definition),
16-279
16-337
16-255
16-238
16-230
16-206
16-122
16-443
12-7
16-407
16-395
12-30
16-115
11-51
16-365
15-43
19-5
5-1
16-301
16-287
16-269
16-318
16-233
16-301
16-201
16-425
16-409
16-392
16-163
16-193
16-200 16-392
,
16-189
16-279
16-337
16-242
16-217
15-41
Index
16-
16-
,
16-
16-304
16-
16-
16-
16-
Index-23