Table of Contents
Advertisement
MPC823e Instruction Set—mtspr
mtspr
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
SPR*
NOTE: *This is a split field.
Definition
Operation
Description
B-102
mtspr
SPR,rS
3
4
5
6
7
19
20
21
22
23
Move to Special-Purpose Register
← spr[5–9] || spr[0–4]
n
) ← rS
SPR(
n
In the PowerPC UISA, the SPR field denotes a special-purpose
register, encoded as shown in the following table. The contents
of rS are placed into the designated special-purpose register.
SPR*
DECIMAL
SPR[5–9]
SPR[0–4]
1
00000
8
00000
9
00000
NOTE: *The order of the two 5-bit halves of the SPR number is reversed compared
with actual instruction coding.
If the SPR field contains any value other than one of the values
shown in the table above, and the processor is operating in user
mode, one of the following occurs:
•
The system illegal instruction error handler is invoked.
•
The system supervisor instruction error handler is invoked.
•
The results are boundedly undefined.
Other registers altered:
•
See table above.
MPC823e REFERENCE MANUAL
8
9
10
11
12
S
SPR*
24
25
26
27
28
467
REGISTER
NAME
00001
XER
01000
LR
01001
CTR
13
14
15
29
30
31
0
MOTOROLA
Advertisement
Table of Contents
