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MPC823e Instruction Set—addic.
addic.
Assembler Syntax
BIT
0
1
2
FIELD
13
BIT
16
17
18
FIELD
Definition
Operation
Description
B-12
addic.
rD,rA,SIMM)
3
4
5
6
7
19
20
21
22
23
SIMM
Add Immediate Carrying and Record
rD " (rA) + EXTS(SIMM)
The sum (rA) + SIMM is placed into rD.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO
The CR0 field may not reflect the "true" (infinitely precise)
result if overflow occurs (see XER below).
XER:
Affected: CA
Simplified mnemonics:
subic. rD,rA,value
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
8
9
10
11
12
D
24
25
26
27
28
equivalent to
addic. rD,rA,–value
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
FORM
D
MOTOROLA
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