Motorola MPC823e Reference Manual page 1329

Microprocessor for mobile computing
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RISC microcontroller,
16-17
RISC timer tables,
SCCx in AppleTalk mode,
SCCx in ASYNC HDLC mode,
SCCx in Ethernet mode,
SCCx in HDLC mode,
SCCx in Transparent mode,
SCCx UART controller,
serial communication controllers,
16-114
serial interface,
serial management controllers,
serial peripheral interface,
SMC in GCI mode,
SMC in Transparent mode,
SMC in UART mode,
system interface unit,
16-74
timers,
universal serial bus,
19-2
video controller,
fetch serialization, causes of,
2-11
FIELD,
filter, context-dependent,
finite impulse response (FIR) filter,
16-26
FIR (definition),
FIR1
16-41
applications,
coefficients and sample data buffers,
function descriptor,
16-41
parameter packet,
16-39
FIR1,
FIR2
16-45
applications,
coefficients and sample data buffers,
function descriptor,
16-45
parameter packet,
FIR3
16-49
applications,
coefficients and sample data buffers,
function descriptor,
16-49
parameter RAM,
16-46
FIR3,
FIR5
16-53
applications,
coefficients and sample data buffers,
function descriptor,
16-53
parameter RAM,
16-50
FIR5,
FIR6
coefficients and sample data buffers,
function descriptor,
16-57
parameter packet,
16-54
FIR6,
fixed-point exception cause register,
16-273
flag sequence,
16-103
fly-by mode,
MOTOROLA
16-5
16-266
16-269
16-319
16-234
16-302
16-202
16-165
16-384
16-434
16-425
16-409
16-393
12-2
16-352
6-12
20-14
16-26
16-39
16-40
16-42
16-43
16-47
16-47
16-50
16-51
16-54
16-55
6-23
MPC823e REFERENCE MANUAL
16-196
FM0,
16-196
FM1,
format
16-318
Ethernet frame,
16-292
high-speed IrDA,
I2C controller memory,
level one descriptor,
level two descriptor,
16-265
LocalTalk frames,
16-288
low-speed IrDA,
middle-speed IrDA,
SCCx buffer descriptors,
serial management controller memory,
serial peripheral interface memory,
SMC in UART mode frames,
16-201
UART character,
universal serial bus commands,
19-17
video RAM word,
formats
B-1
instructions,
16-213
fractional stop bits,
frame buffer A start address register,
frame buffer B start address register,
18-6
frame buffer,
frame check sequence,
frame length, maximum,
frame reception
SCCx in ASYNC HDLC mode,
SCCx in Ethernet mode,
SCCx in HDLC mode,
SCCx in Transparent mode,
SMC in Transparent mode,
SMC in UART mode,
frame transmission
SCCx in ASYNC HDLC mode,
SCCx in Ethernet mode,
SCCx in HDLC mode,
SCCx in Transparent mode,
SMC in Transparent mode,
SMC in UART mode,
2-12
FRAME,
free access override mode,
frequencies, requirements for switching,
5-14
frequency jitter,
frequency of an application,
frequency of interrupt routines,
2-4
20-30
FRZ,
,
16-259
full-duplex operation,
function descriptor (FD),
G
16-150
GCI (definition),
5-19
GCLKx frequency,
5-14
GCLKx,
Index
16-467
11-9
11-10
16-289
16-179
16-385
16-442
16-393
16-363
18-27
18-28
16-273
16-115
16-270
16-324
16-235
16-303
16-410
16-394
16-269
16-323
16-234
16-302
16-409
16-393
11-4
5-17
5-17
5-17
16-27
16-425
,
Index-11

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