Table of Contents
Advertisement
PCMCIA Interface
17.4.3 Interrupts
Each input from the PCMCIA card to the host (BVD, CD, RDY and VS) is sampled in the
PCMCIA interface input pins register (PIPR) and any change to these bits is reported in the
PCMCIA interface status change register (PSCR). The contents of the PSCR is AND'ed with
the PCMCIA interface enable register (PER) to generate a PCMCIA interface interrupt. You
can program the interrupt level for the exception that is generated. The PCMCIA interface
can generate an additional interrupt for the RDY/IRQ signal. This interrupt can be generated
for level (low or high) and for change (fall or rise) of the input signal.
17.4.4 Power Control
You can perform a write cycle using one of memory controller's CS signals to operate an
external device that provides a regulated source voltage to the PCMCIA slot. There are a
number of such devices available. However, auto-power control is not supported.
17.4.5 Reset and Three-State Control
You can write to the right bit in the PCMCIA general interface control register B (PGCRB)
and cause the PCMCIA card to be reset or to disable the output drive of the external latches.
17.4.6 DMA
The MPC823e's DMA module with the CPM microcode provides two independent DMA
channels. The PCMCIA module can be programmed to generate control for an I/O device
implemented as a PCMCIA card to act on a DMA transfer. Refer to the PCMCIA 2.1
Specification for more information. You can use the PRS field in the appropriate PCMCIA
option register to program any window to be a DMA window. The PCMCIA controller
supplies the signaling for the socket. DMA to or from the PCMCIA interface is accomplished
with dual-address DMA transfers. DMA requests can be supplied through the SPKR,
IOIS16_B or INPACK signals. The signal that is used depends on the card that is in the slot.
To support the DMA function across all cards, the implemented slot's INPACK signal must
be connected to the DREQ2 signal. To support the DMA function, the slot's INPACK must
be connected to DREQ2. The actual source used for a DMA request is programmed in the
CBDREQ[0:1] field of the PGCRB register. If the internal DMA request is enabled, then port
C must not be programmed to DREQ2. When the internal DMA request is disabled, then the
DMA request is assumed to be DREQ2. In this case, you must program port C's PC14 to
DREQ2.
Note: The PCMCIA controller will internally monitor the SDACK2 signal to meet the
IDMA handshaking protocol. Therefore, you do not have to monitor this signal for
your PCMCIA design.
17-8
MPC823e REFERENCE MANUAL
MOTOROLA
Advertisement
Table of Contents
