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MPC823e Instruction Set—b
b
Assembler Syntax
BIT
0
1
2
FIELD
18
BIT
16
17
18
FIELD
Definition
Operation
Description
B-20
b
target_addr (AA = 0 LK = 0)
ba
target_addr (AA = 1 LK = 0)
bl
target_addr (AA = 0 LK = 1)
bla
target_addr (AA = 1 LK = 1)
3
4
5
6
7
19
20
21
22
23
LI
Branch
if AA then NIA ←
EXTS(LI || 0b00)
iea
NIA ←
else
CIA + EXTS(LI || 0b00)
iea
if LK then LR ←
CIA + 4
iea
target_addr specifies the branch target address.
If AA = 0, then the branch target address is the sum of LI || 0b00
sign-extended and the address of this instruction. If AA = 1, then
the branch target address is the value LI || 0b00 sign-extended.
If LK = 1, then the effective address of the instruction following
the branch instruction is placed into the link register.
Other registers altered:
Affected: Link Register (LR) (if LK = 1)
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
8
9
10
11
12
LI
24
25
26
27
28
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
29
30
31
AA
LK
FORM
I
MOTOROLA
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