Motorola MPC823e Reference Manual page 1070

In general, breakpoints are recognized in the core only when the MSR
guarantees machine restartability after a breakpoint. In this working mode, breakpoints are
masked. There are times when it is preferable to enable breakpoints even when the MSR
bit is clear, even though there is a risk of causing a nonrestartable machine state. In
programmable nonmasked mode, an external development system can choose to assert a
nonmaskable external breakpoint. Watchpoints are not masked and are always reported on
the external pins, regardless of the value of the MSR
counting watchpoints, are part of the internal breakpoint logic and are not decremented
when the core is in masked mode and the MSR
Internal watchpoints are generated when a user-programmable set of conditions are met.
Internal breakpoints can be programmed to be generated either when one of the internal
watchpoints is asserted or after an internal watchpoint is asserted for user-programmable
times. Programming a certain internal watchpoint to generate an internal breakpoint can be
accomplished either in the software by setting the corresponding software trap enable bit or
on-the-fly using the serial interface of the development port to set the corresponding trap
enable bit.
External breakpoints can be generated by any of the system peripherals, including those
found on or outside the MPC823e or those found by an external development system.
Peripherals on the external bus use the serial interface of the development port to assert an
external breakpoint.
20.3.1 Internal Watchpoints and Breakpoints
Internal watchpoints and breakpoints are used in software debugging and the sources are
illustrated in Figure 20-1. For the recoverable interrupt bit of the MSR, see Section 6
The PowerPC Core . Watchpoints do not stop your code from executing, but they indicate
when you have passed a certain testing point. Breakpoints are actually the points at which
execution is stopped. For more information on external breakpoint support, refer to
Section 20.4 Hardware Development System Interface . Internal breakpoint and
watchpoint support is based on:
• Eight comparators that compare information on instruction and load/store cycles
• Two counters
• Two AND-OR logic structures
The comparators perform a comparison on the instruction address (I-address), the load/
store address (L-address), and the load/store data (L-data). The comparators can detect the
following conditions:
• Equal to
• Not equal to
• Greater than
• Less than
MOTOROLA
Development Capabilities and Interface
bit. The counters, although they are
RI
bit is clear.
RI
MPC823e REFERENCE MANUAL
bit is set, which
RI
RI
20-9