Motorola MPC823e Reference Manual page 1201

MPC823e Instruction Set—dcbi
When data address translation is enabled, MSR[DR] = 1, and the
virtual address has no translation, a DSI exception occurs. The
function of this instruction is independent of the write-through
and caching-inhibited/allowed modes of the block containing the
byte addressed by EA. This instruction operates as a store to the
addressed byte with respect to address translation and
protection. The referenced and changed bits are modified
appropriately. This is a supervisor-level instruction.
Other registers altered:
• None
POWERPC ARCHITECTURE SUPERVISOR OPTIONAL FORM
LEVEL LEVEL
UISA X
MOTOROLA MPC823e REFERENCE MANUAL B-43