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mullw
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
MOTOROLA
mullw
rD,rA,rB (OE = 0 Rc = 0)
mullw.
rD,rA,rB (OE = 0 Rc = 1)
mullwo
rD,rA,rB (OE = 1 Rc = 0)
mullwo.
rD,rA,rB (OE = 1 Rc = 1)
3
4
5
6
7
19
20
21
22
23
OE
Multiply Low Word
rD ← rA ∗ rB
The 32-bit operands are the contents of rA and rB. The low-
order 32 bits of the 64-bit product (rA) * (rB) are placed into rD.
The low-order 32 bits of the product are the correct 32-bit
product for 32-bit implementations. The low-order 32-bits of the
product are independent of whether the operands are regarded
as signed or unsigned 32-bit integers. If OE = 1, then OV is set
if the product cannot be represented in 32 bits. Both the
operands and the product are interpreted as signed integers.
Note that this instruction may execute faster on some
implementations if rB contains the operand having the smaller
absolute value.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1).
The CR0 field may not reflect the "true" (infinitely precise)
result if overflow occurs (see XER below).
XER:
Affected: SO, OV (if OE = 1).
The setting of the affected bits in the XER is mode-
independent, and reflects overflow of the 32-bit result.
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—mullw
8
9
10
11
12
D
24
25
26
27
28
235
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
RC
FORM
XO
B-107
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