Motorola MPC823e Reference Manual page 1340

Microprocessor for mobile computing
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Index
2-5
PCWE,
16-4
PDA example,
16-498
PDDAT,
16-498
PDDIR,
17-13
PER,
performance
16-334
Ethernet,
HDLC bus controller,
9-15
maximizing,
performance, achieving the best,
periodic interrupt count register key,
periodic interrupt status and control register key,
27
periodic interrupt status and control register,
periodic interrupt timer block diagram,
periodic interrupt timer count register,
periodic interrupt timer register,
periodic interrupt timer,
15-42
periodic timers,
17-15
PGCRB,
5-14
phase jitter,
5-13
phase skew,
pin assignments
16-479
port A,
16-484
port B,
16-490
port C,
16-497
port D,
16-22
PWM channels,
2-1
pinout diagram,
pins
23-2
assignment,
development support,
16-155
NMSI,
system interface unit,
universal serial bus,
2-1
pins,
2-12
pins, unconnected,
pipeline bubbles, cause of,
17-9
PIPR,
12-23
PISCR,
5-27
PISCRK,
12-24
PITC,
5-27
PITCK,
12-25
PITR,
18-10
pixel generation,
13-7
PLL,
PLL, low power, and reset control register,
PLL, low-power and reset control register key,
5-27
PLPRCRK,
2-6
4-2
PORESET,
,
port A
data direction register,
16-480
data register,
open-drain register,
pin assignment register,
Index-22
16-261
5-24
5-27
12-23
12-22
12-24
12-25
12-22
20-29
12-29
16-354
6-5
5-7
5-27
16-481
16-480
16-481
MPC823e REFERENCE MANUAL
Port B
memory map,
port B
data direction register,
data register,
open-drain register,
pin assignment register,
port C
data direction register,
data register,
interrupt control register,
5-
pin assignment register,
special options register,
port D
data direction register,
data register,
pin assignment register,
port width (definition),
ports, special to MSR,
17-17
PORx,
power
conserving,
17-8
PCMCIA,
power consumption
minimizing,
power control
keep-alive power
register locking,
keep-alive power,
5-24
operation,
power rails,
5-24
power planes,
5-24
power rails,
power supply pins,
power supply requirements,
power, reducing,
power, switching schemes,
power-down mode, exiting from,
power-on reset,
power-on reset, state of key registers,
PowerPC core
6-1
about the,
basic structure,
6-1
features,
PowerPC standards
PowerPC Operating Environment Architecture
(Book 3)
branch processor,
fixed-point processor,
interrupts,
optional facilities and instructions,
reference and change bits,
storage control instructions,
storage model,
timer facilities,
3-11
16-488
16-487
16-485
16-489
16-493
16-493
16-496
16-494
16-494
16-498
16-498
16-499
13-1
6-11
16-200
9-7
10-11
,
5-27
5-25
5-24
2-12
5-25
5-19
5-26
5-30
4-2
5-27
6-2
7-6
7-6
7-7
7-7
7-7
7-6
7-17
MOTOROLA
7-17

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